Robust Electronic Design, Inc.

RELATED DOCUMENTS:

• Barnes, John R., "Designing Electronic Equipment for ESD Immunity-- Part I".
• Barnes, John R., "Designing Electronic Equipment for ESD Immunity-- Part II".
• Barnes, John R., "Designing Electronic Systems for ESD Immunity".
• Annotated Bibliography
• Sources of Information & Want List

The following keywords (key phrases) are used in the annotated bibliography for John R. Barnes' article "Designing Electronic Equipment for ESD Immunity":

• Air discharge,
• Aluminum tape,
• Analog circuits,
• Antennas,
• Arcing,
• Audit trails,
• Balance,
• Bandwidth,
• Bibliography,
• Bipolar devices,
• Blocking,
• Bonding,
• Breakdown strength,
• Bypassing/decoupling,
• Cable entry points,
• Cable routing,
• Cables,
• Capacitance,
• Capacitive coupling,
• Capacitors,
• Case histories,
• Charge injection,
• Charged device model (CDM),
• Checkpoints,
• Checksums,
• Clamping voltage,
• Clamps,
• CMOS devices,
• Cold start,
• Common-impedance coupling,
• Common-mode,
• Common-mode chokes,
• Computer crashes,
• Conductive charging,
• Conductive coatings,
• Conductive fabrics,
• Conductive fillers,
• Conductive paints,
• Conductive plating,
• Connectors,
• Contact discharge,
• Controls,
• Copper tape,
• Corona,
• Corrosion,
• Crowbars,
• Current probes,
• Cyclic redundancy check (CRC),
• Data errors,
• Derating components,
• Diagnostics,
• Differential mode,
• Disabled states,
• Discoidal capacitors,
• Dipole model,
• Direct discharge,
• Double-sided boards,
• Edge-triggered logic,
• Electric field,
• Electro-explosive devices (EED's),
• Electromagnetic pulse (EMP) protection,
• Enclosures/housings,
• Error-correcting codes (ECC),
• Error detection,
• Error logging,
• Error recovery,
• ESD charge,
• ESD current,
• ESD current path,
• ESD damage,
• ESD duration,
• ESD energy,
• ESD frequency range,
• ESD immunity,
• ESD monitor,
• ESD performance criteria,
• ESD risetime,
• ESD severity levels,
• ESD simulator (charged device model),
• ESD simulator (crossed-vane),
• ESD simulator (furniture ESD),
• ESD simulator (human body model),
• ESD simulator (machine model),
• ESD simulator (other),
• ESD simulator (transmission line pulse),
• ESD sources,
• ESD standards,
• ESD testing,
• ESD upsets,
• ESD voltage,
• ESD waveform,
• Ethernet,
• Exception handling,
• Fail safe,
• Failure modes,
• Fasteners,
• Fault tolerance,
• Feedthrough capacitors,
• Ferrite beads/sleeves,
• Field-induced breakdown (FIB),
• Filters,
• Floating inputs,
• Framing,
• Furniture ESD,
• Galvanic series,
• Gas tubes,
• Gaskets,
• Ground fill,
• Ground grids,
• Ground planes,
• Ground straps,
• Ground wires,
• Grounding,
• Guard rings,
• Hand/tool model,
• Handshaking,
• Hangs,
• Heatsinks,
• High-frequency measurements,
• Human body model (HBM),
• Humidity,
• Indicators,
• Indirect discharge,
• Induced charge,
• Inductance,
• Inductive charging,
• Inductive coupling,
• Inductors,
• Input checks,
• Input/Output (I/O) circuits,
• Input/Output (I/O) errors,
• Input protection,
• Intermittent errors,
• Interrupts,
• Keyboards,
• Laser,
• Latch-up,
• Lead-length effects,
• Leakage current,
• Level-sensitive logic,
• Lightning protection,
• Liquid Crystal Display (LCD) panels,
• Lock-ups,
• Loop area,
• Machine Model (MM),
• Magnetic field,
• Magnetoresistive (MR) recording heads,
• Memory access time,
• Memory errors,
• Metal-oxide varistors (MOV's),
• Metalized fabric,
• MOSFET's,
• Multifunction capacitors (MFC's),
• Multilayer boards,
• Noise-energy immunity,
• Noise immunity,
• Openings,
• Optoisolators,
• Output checks,
• Output protection,
• Parasitic SCR,
• Parity,
• Paschen's Law,
• Pigtails,
• PIN diodes,
• Potential,
• Power cords,
• Power distribution,
• Power protection,
• Power supplies,
• Power supply monitors,
• Printed circuit boards (PCB's),
• Program flow errors,
• Radio Frequency (RF) circuits,
• Range checking,
• Redundancy,
• Refreshing peripherals,
• Resets,
• Resetting,
• Resistance,
• Resistors,
• Response time,
• Rounded corners,
• Run-time checks,
• Safe state,
• Sampling data,
• Scaling laws,
• Seams,
• Secondary arcs,
• Sharp edges/points,
• Shielding,
• Shock threshold,
• Showering arcs,
• Shunting,
• Sidactors,
• Slots,
• Software,
• Spacing,
• Spark gaps,
• Static dissipaters,
• Strobing data,
• Substitute parts,
• Switches,
• Thyristors,
• Tokens,
• Transfer Impedance,
• Transposing lines,
• Transient voltage suppressors (TVS's),
• Transils,
• Triboelectric charging,
• Triboelectric series,
• Twisted pairs,
• Type checking,
• Universal serial bus (USB),
• Unused memory,
• Unusual forms of ESD,
• Wait states,
• Warm start,
• Watchdog timers,
• Weather,
• Work function,
• Zener diodes,

1. Work.
2. Are safe and reliable.
3. Can be manufactured, tested, repaired, and serviced economically.
4. May be sold and used worldwide.
5. Can be easily adapted/enhanced to meet new and changing requirements.

Our President, John R. Barnes, is a Professional Engineer licensed in the state of Kentucky, a NARTE-Certified Electromagnetic Compatibility Engineer, a NARTE-Certified Electrostatic Discharge Control Engineer, a Senior Member of the IEEE, and an Advanced-class amateur radio operator. He has written one book, Electronic System Design: Interference and Noise Control Techniques, that was published in English and Russian. He is writing his second book, Robust Electronic Design Reference for Kluwer, due out in late 2003. He has also written articles on designing electronics for electrostatic discharge (ESD) immunity for Printed Circuit Design and Conformity magazines.

Robust Electronic Design, Inc. and dBi Corporation may be contacted by:

• E-mail at jrbarnes@iglou.com
• Fax at (859)252-6128.
• Phone at (859)253-1178.
• Snail-mail at 216 Hillsboro Ave, Lexington, KY 40511-2105.